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Which risk increases when a silicon-controlled rectifier's (SCR) gate trigger pulse width decreases at a constant amplitude?

A)Increased latch-up failure chance
B)Decreased forward overvoltage protection
C)Amplified thermal runaway effects
D)Suppressed reverse recovery effects

💡 Explanation

Decreasing the gate trigger pulse width increases the risk of latch-up failure because insufficient charge carriers result in incomplete switching during the brief pulse, therefore the SCR might not fully latch, rather than reliably turning on and staying on under normal operating conditions.

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